Iron - LPT COVOX and not only ...

<b>Iron</b> - LPT COVOX and not only ...

        LPT COVOX and not only ...

music by DNK
(C) Rzhavelschik.


Instead of preface.


   Well. I welcome those who choose to
look at the section with such unlikely name. And I hasten to 
please them the news that, because this unit in largely lost 
its relevance (due to the advent of "General Sound ") it goes 
here, mainly on that not only.



   But for the beginning of the device, whose name is given in 
the title. LPT COVOX represents a simple single-channel 8-bit 
DAC. And it can be used, for example, plays polyphonic music, 
recorded on technology ACE'a (What is given in our application 
- simple design with supplied non- testikom rabochesti Covoxa, 
it is not even pitiful semblance of music. Under full

demo is not enough room: (, as it
device support, some new
music editors (in particular SAMPLE
TRACKER). That's it. But, as you noticed
(Or even notice) to connect this
primitive design to your cars it is necessary that it (the car) 
had a port Printer type Centronix. And, so much so Pentagon and 
Scorp, have ready the printer port, not extended ones are the 
only models Speccy, we decided that It is worth to show that 
proper to do if your car has no such

architectural excesses. However, look at nizhesleduschuyu 
information will not prevent all, regardless of their cars. 

Whereupon finish this somewhat lengthy epigraph and turn to the 
main part. So: 


    Principles of operation of ports.

for example the construction of a port for LPTcovox.


Yes, the most impatient Connectors can
work hard to quickly browse to shemki.



   You ever thought that lies behind the word "port"? (Or 
options: port # FE, # 7FFD port, etc.) And by this 
straightforward word hides a set of technical tools that 
provide a hit on the data bus, the computer data from the input 
port (when the processor commands read from the port) or vice 
versa - Contact information Data bus companies to the port 
outputs (of course, under the command processor from the group 
entry to the port ") is simply speaking - when the processor 
the appropriate commands on the data bus set the logic levels 
as in the corresponding legs of chips are employed as the 
conclusions of the port (going to pins of the port), well

and (or) vice versa - at the feet of these levels are 
established as the relevant lines of data bus. 

   Well, I hope the question of what makes a port, explained in 
full. Remained a mere trifle - to learn, and how he does it? To 
clarification of this process was more easily take anywhere book

(Send a maid in cellar ..."), which has a picture with a 
symbolic image of Z80 and the names of his conclusions. Take? - 
Well. (Although it was possible and not to take) Now you 
comprehend the great sacrament of communion CPU with its 
surroundings. Pay attention to the three signals: RD, WR and

IORQ. Signals are inverted, ie their active
- Low (logic 0). When the system
reads (no matter from where -
from the port or from memory) to output (PINE)
RD set urove active, ie
log. 0. When do you write (as in
memory, and in port), the active level
installed on Pina WR. Indication that the processor tries to 
read from port, or to withdraw to the port is the appearance of 
an active level on Pina IORQ. So way, watching these signals 
(collecting most primitive logical shemku), we can determine 
that it is time to wake up to the iron port. However, apart 
what we have to determine whether treatment to ports would cost 
more and you know what specifically calls out the port 
processor. For solutions that address bus tasks it is used. And 
here and there that the main question Platform "Spectrum-clone" 
- a way to decrypt the address. " Case that port space at Z80, 
unlike his predecessors, and pathetic analogues (such as i8080 
and so forth), the size same memory address space -

ie 64Kbayta, which means that the address
port is not displayed on the half, but on the whole
address bus. As you know, the Z80 is
two ways to specify port address: via
register-pair BC, or the number of
(OUT (# dd), a). In the second method the number of
brackets (opernd commands) displayed on the
"Junior B" address bus, ie line
A7-A0, and the "byte" - lines A15-A8
displays the contents of register A (ie
such a way to specify addresses without problems
suitable for reading, but writing can
conflicts arise nekotrye)
For those who have not studied the subjects of type
CSMP, explains: when the processor begins
execute a command to read or write, then
besides the fact that the signals RD, WR, IORQ, MREQ
come to the appropriate state for
bus address set the address for
which, in fact, made the operation. What does "set address"? 
Here's what: place (mentally) address lines in descending order:

A15, A14 ,..., A0. Now, imagine that
each line - this bit (bit) numbers,
represented in the binary system. When installed on the bus 
which - either a number, it means that the relevant lines, 
"bits" have been established logic levels 0 or 1, thus forming

as a number in binary form.
now all the attention! state of the address bus when you run 
OUT (C), A (BC = # 7FFD):


A 15 = 0 As you can see, only two bits are not nuA 14 = 1 left. 
Theoretically, it was necessary A 13 = 1 would be to build on 
shemku elemenA 12 = 1 max AND and OR, which dopusA 11 = 1 note, 
issued to us one unit, A 10 = 1 the condition is a state

A 09 = 1 address bus. But such a decision
A 08 = 1 for a simple home kompyuA 07 = 1 tera somewhat 
redundant. In A 06 = 1, the principle can be verified only

A 05 = 1 two address lines - A15 and A1.
A 04 = 1 At this address decoding poyA 03 = 1 Chd just one log. 
element tiA 02 = 1 Pa, NOR, but this deshifraA 01 = 0 the 
function is not complete, ie port A 00 = 1 will be chosen not 
only for addresses # 7FFD, but also

16,384 th other locations, which will also have the A15 and A1 
equal 0.No some and this decision seemed redundant, and

Therefore, in some Spectrum-clones for decoding the address of 
this port yuzaetsya only A1 (32,768 addresses disappears).

I believe that all of the above
the essence of decoding addresses is clear -
for the implementation thereof is required to connect to the 
bus address of the log. shemku that could give at the output of 
the active level at a certain state lines this bus.


   Well, now we know that
required to use the port, and can identify - a. Hence, it is 
time to move properly to perform the operation. And for the 
reading (or record) will require PMI, which can

play the role of a leaf to
data, which opens when you access
port and closing in the absence of onogo.Na this role is most 
suited mikroshemka family of memory registers. There are 
several subtleties. Subtlety Room 1: forest of reliability is 
not would be advisable to build the signals so that

in (out) port is not flying false values
(For example - so that when a new treatment for
outputs do not flashed the old values). Fineness number is: if 
you make a port read, Sinclair-joystick

For example, it does not hurt to make sure
you've selected an exotic import
melkoshemka able to translate their outputs
in the Z-state (a sign of this ability is the presence of 
quasi-graphical representation in reference to the diamond 
field output signals), and if not, then choose another, or come 
up with even more exotic way to disable it from the bus

data because if the data bus is constantly hanging something 
clogging all the data its own, it can lead to very

sad consequences. ("... How many times
repeat! not 'given oak' and 'lethal
outcome'...)

   So, summary: in order to make
port need to hang on the system bus logic, identifies an appeal 
to the port and is responsive to a specific address, a logic to 
this, and again the bus managed to hitch signals of logic 
"vent". 

Well, now own that for which
was started all this nonsense. Paralelny
8-bit output port.

                           IR23
legs Processor

  Z80 __ DI RG <>

    __WR: 22 DO
____RD: 21 D0 0
IORQ____: 20 D1 1

    MREQ: 19 D2 2 0 n

                   D3 1 March and

                    D4 February 4

                    March 5 D5 C

                    D6 June 4 O

               LE4 D7 May 7 V

        ____ H 6 O

        IORQ 1 0> C 7 X

        __A2

        WR


                        0OE



Teoreticheski it - a "port # FB", but in practice, as you know, 
he will respond to appeal to any address in which the 2-nd

bit is 0 (ie, 32,768 addresses), however,
this case does not lead to terrible
consequences, because it's just port
O, who works on the sound. (razve only
sometimes the speakers will rumble intermittently 
mysteriously:). Now a few words about how this thing works. 
When a Pina C by the positive differential signal

(No units, namely gradient, ie) at
outputs (DO) are inputs and
recorded there, until a new
"Steps" that will drive to pins DO
new values from the data bus. Signal H
changes in 1-chku when IORQ + WR + A2 = 0 (under
"+" Meaning OR), ie when the processor tries to shove the data 
into the port address which even remotely resembles # xxFB.

If you prefer, you can cook up a scheme for decoding the 
address, which will be understood and # FB (Pentagon) and # DD 
(Scorp) (with a special request - at the same LE4). ICs can 
take any TTL series, and pay attention to one thing - bringing 
the scheme is not an interface circuit Centronix. To work with 
the printer to another two signals - strob and busy. (For what 
they must - see the specification on Centronix)

Well, actually, that's all.

   P.S. Dear readers, we would very much
wanted to know your opinion on a fermenting in the depths of 
editorial thought, (not think that she's lonely, thoughts

rush scary herds, sweeping away everything in
its path), namely: Do not make us
Field-type iron for Dummies "(not
offense, it is mot have already come into
chant), which explains how a computer works and any other 
miscellaneous hardware. And if you do, then what else is there 
write? We will wait for your letters.