Hardware - IDE interface.

MSF #22
Track: Composed by me! Xe-xe.. :)  
Author: Macros, 14 July 2K1.             
---------------------------------------------------

      ATA IDE interface cable          

+======+=======+=====+======+==========+ 
|Signal|Type*1 |Cont.|Type*1 |Signal | 
+======+=======+==+==+======+==========+ 
|RESET#|I |1 |2 |      | GND | 
+------+-------+--+--+------+----------+ 
|D7 |I/O TS |3 |4 |I/O TS|D8 | 
+------+-------+--+--+------+----------+ 
|D6 |       |5 |6 |      |D9 | 
+------+-------+--+--+------+----------+ 
|D5 |       |7 |8 |      |D10 | 
+------+-------+--+--+------+----------+ 
|D4 |       |9 |10|      |D11 | 
+------+-------+--+--+------+----------+ 
|D3 |       |11|12|      |D12 | 
+------+-------+--+--+------+----------+ 
|D2 |       |13|14|      |D13 | 
+------+-------+--+--+------+----------+ 
|D1 |       |15|16|      |D14 | 
+------+-------+--+--+------+----------+ 
|D0 |I/O TS |17|18|I/O TS|D15 | 
+------+-------+--+--+------+----------+ 
| GND |       |19|20|      |Key |+------+-------+--+--+------+----------+ 
|DMARQ |O TS*2 |21|22|      |GND       | 
+------+-------+--+--+------+----------+ 
|DIOW# |I      |23|24|      |GND       | 
+------+-------+--+--+------+----------+ 
|DIOR# |I      |25|26|      |GND       | 
+------+-------+--+--+------+----------+ 
|IORDY |O OK   |27|28|I/O   |SPSYN/CSEL| 
+------+-------+--+--+------+----------+ 
|DMACK#|I      |29|30|      |GND       | 
+------+-------+--+--+------+----------+ 
|INTRQ |O TS*2 |31|32|O OK  |IOCS16#   | 
+------+-------+--+--+------+----------+ 
|DA1   |I      |33|35|I,O*3 |PDIAG#    | 
+------+-------+--+--+------+----------+ 
|DAO   |I      |35|36|I     |DA2       | 
+------+-------+--+--+------+----------+ 
|CSO#  |I      |37|38|I     |CS1#      | 
+------+-------+--+--+------+----------+ 
|DASP# |I/O    |39|40|      |GND       | 
|      |OK*4   |  |  |      |          | 
+------+-------+--+--+------+----------+ 
|+5 В  |Logic  |41|42|Motor |+5 В      | 
+------+-------+--+--+------+----------+ 
|GND   |       |43|44|      |Type 0=ATA| 
+======+=======+==+==+======+==========+ 

  *1  Тип  сигнала  для  устройства:  I -
вход,  O  - выход, I/O - двунаправленный,
TS  -  тристабильный,  OK - открырый кол-
лектор.                                  
  *2  У  старых  устройств  сигнал  может
иметь тип OK (при разнотипных сигналах на
одной шине возможенconflict)            
  *3 Device-0 has an input, device-1 has an input
-- exit                                 
  *4 Device-1 has only output       
  Pins 41-44 are used for mini-
turkish discs                            

  Reset# - device reset              
  DA 2-0 - three least significant bits of the system bus
These are the addresses used to select the re-
device girs                        
 D 0-15 - bidirectional data bus   
  DIOR# - strobe for reading input/output ports
yes.  Data is recorded on the positive
signal drop                         

  DIOW# - the same, for recording              
  IORDY - device readiness to complete
exchange cycle.  Low signal level during
exchange cycle time the device can
enter bus wait cycles               

  IOCS16# - resolution of 16-bit operating
tions.  Access to all registers except
data register, always 8-bit.        

  DMARQ - exchange request over a DMA channel
(signal optional)                  

  DMACK# - DMA confirmation             
  INTRQ - interrupt request. The output must
be tristable, active signal -
log. 1.                                  

  CSO# - select command register block 

  CS1# - selection of control relay block
histrov                                  

  PDIAG# - signal about passing diagnostics
tics. Signalserves only to connect two
devices, and the host adapter is not used
enjoys.                              

  DASP# - dual purpose signal: in-
device activity indicator and
presence of device-1.  The devices have
output type "open collector" with load
a 10 kOhm resistor to the +5 V bus.
The adapter uses this signal to turn on
Readings of the LED access indicator
disk.                                   

  SYSIN/CSEL - spindle/synchronization
- cable harness.                          

 XT IDE interface cable:               
+======+=====+==+==+===+  
|RESET#|I | 1|2 |all except the 20th -|  
|D7 |I/O TS| 3|4 |GND |  
|D6 |      | 5|6 |                 |  
|D5 |      | 7|8 |                 |  
|D4 |      | 9|10|                 |  
|D3 |      |11|12|                 |  
|D2 |      |13|14|                 |  
|D1 |      |15|16|                 |  
|D0 |I/O TS|17|18|                 |  
|GND |      |19|20|Key |  
|AEN |I |21|22|                 |  
|DIOW# |I |23|24|                 |  
|DIOR# |I |25|26|                 |  
|DMACK#|I |27|28|                 |  
|DMARQ |O OK |29|30|                 |  
|INTRQ |O TS |31|32|                 |  
|DA 1 |I |33|34||  
|DA 0 |I |35|36|                 |  
|CSO# |I |37|38|                 |  
|DASP# |I/O OK|39|40|                 |  
+======+=====+==+==+===+  

  A number of ATA (AT IDE) devices have a jam-
lane, switching operating mode XT/AT (in
Seagate drives for this possibility
ness indicates the ending AX in the notation
ni model)                              

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