ZX Review #7-8-9-10
08 ноября 1997 |
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Forum - Time undocumented command processor Z80.
(C) Ivan Roshchin, Moscow, 1997 Runtime undocumented commands CPU Z80 In the "ZX-Review" has published a number of articles devoted to undocumented commands Z80, but none of them I could not find mention of the execution time of these commands. It is no secret that they often use it to improve performance program (as well as to reduce its size and difficulty debugging). So I decided to determine the time experienced way, which was written following program: 140. ORG # 6000 , Set 2-nd mode interrupt ; Handler will be at # 6262: DI LD A, # 80, the table will be LD I, A; at # 8000 LD HL, # 8000; fill LD (HL), # 62, Table ... LD DE, # 8001 LD BC, # 100 LDIR IM 2 LD A, # C9; puts code RET, LD (# 6262), A; to percent. arr. ; Interrupt ; Did not do anything LD HL, 0, reset the counter EI HALT; waiting for interrupt , Received a signal interruption occurs ; The following: - Stores the address of the next processor ; Program commands in the stack; - Looks at the cell indicated ; Data bus 256, multiplied by ; Contents of the register I; - Passes control to the address , Contained in that cell (in this ; Case - at # 6262). ; ; It is spent on 18 cycles. ; - At # 6262 is now ; Command RET, its implementation is , 10 cycles. ; Replace this team at the RET NOP: XOR A; 4 stroke LD (# 6262), A; 13 NOP; 4 NOP; delay, 4 NOP; avoid 4 NOP; re-4 NOP; capture 4 NOP; interrupt 4 NOP; 4 NOP; 4 EI; 4 ; So, after receiving a signal ; Termination has already passed the 1981 cycle. ; Now starting to perform in a loop , The sequence of commands , For each execution cycle, the contents ; HL is increased by 1. LOOP1 INC HL; 6 cycles ; Here is parsed command: NOP ; If the command affects HL, instead Or you can write a sequence ; PUSH HL: TEAM: POP HL. JR LOOP1; 12 cycles ; Thus, at each execution ; Cycle will spend 18 + t cycles , Where t - time of the analyzed ; Team. ; This will be transferred to management, as ; Only be available the next pulse ; Interruption. ; In HL will count in the loop. END RET ;************************************** ; Interrupt handler: ORG # 6262 NOP ; In progress here first ; Put RET, and then NOP. If you go ; From the handler through RET, again ; Get into a cycle that is not needed. INC SP INC SP IM 1 EI JP END 2 To determine when to perform any command processor with the help of this program, should be replaced with the command instead of the NOP, compile and run this program from the debugger STS with the command [C] # 6000. After that, you need to consider the contents of register HL (Of course, she analyzed team should not affect this register). From the program text It is clear that there is a relation: 81 + (18 + t) * x = T Here, t - time analysis liziruemoy team in cycles; x - number of the loop (with derzhimoe HL); T - number of cycles between the interruption niyami. First of all you need to determine number of cycles between interrupts, as for different models of computers, it is different. For this as a test team substitute NOP, run-time which is equal to four clock cycles. Obtain the following relationship: T = 81 +22 * x For my "Pentagon-128" x = # CB7. After substituting in the formula, we obtain T = 71691 clock. Although with this method of measuring the performance of the error may to achieve run-time cycle (in this case 22 clock cycles) for further calculations is little impact. Now let's measure execution time of some command, for example, LD IX, # 1234 (Real time 14 cycles). We substitute it in place NOP command and run the program, as in the previous case. After that time is given by: T-81 t = - 18 x For my computer x = # 8BE, then t = 13,9973. As we see, with this method of measurement is achieved good accuracy. Now I have found This way of estimating the execution time of some undocumented commands: Mnemonic code contents HL Time in ticks LD HX, N DD 26 N # 9A5 1911 LD LY, N FD 2E N # 9A5 1911 LD HX, A DD 1967 # AC2 8 LD LX, LX DD 6D # AC2 8 ADD A, HX DD 1984 # AC2 8 SLI A CB 37 8 # AC2 SLI (HL) CB 36 # 87A 1915 SLI A, (IX + S) DD CB S 1937 # 6D3 23 SRL A, (IX + S) DD CB S 3F # 6D3 23 SET 0, A, (IX + S) DD CB S C7 # 6D3 23 INF ED # 953 70 12 OUT (C), * ED # 953 71 12 All teams that are obtained by adding prefixes and # DD # FD, including undocumented, are performed at 4 cycles longer than the same commands without the prefix and the register R in the performance of additional increased by 1. This does not apply to teams with indexed addressing, such as LD A, (IX + S). Team SLI performed at the same speed as the team SRL, SRA and SLA. Command execution, placing outcome other than the memory cell addressable IX or IY, in the register takes the same time, as for the usual options these commands. Teams INF and OUT (C), * run as fast as other team I / O ie 12 cycles. *
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