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Nicron #14
03 января 1997 |
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Programming - a course of study assembler Wlodek Black, continued.
z80
[Continued].
(C) WLODEK BLACK.
00Bh. GROUP TEAMS IO.
UVV - a device I / O (Input / Output Unit).
Any device to communicate with the external environment is
characterized by a fundamental feature: it has two nodes
transmission dannyh.S one hand it is connected to the
microprocessor buses system, on the other - to the device,
which are or from whom the data. Actually, this property and
gave rise to the name "port" for the I / O devices. When
accessing the port processor puts on address bus address port
on the data bus - of bytes (if this output operation), the line
IORQ (request I / O devices) - active low, to write to the port
line is activated WR (write), read from the port is activated
line RD (read). All These signals are installed simultaneously.
If you are currently reading, at the end of the bar is fixed
byte data bus, is an accepted set of data, and cycle time by an
external device. If you write to a port at the end of the bar
simply removed the control signals. In computers, MSX and
Spectrum fact checking is not implemented, whether the external
device has taken the data. Of reversion to the ports are very
similar to memory operations. The only difference is which line
bus control is activated - MREQ (memory query) or IORQ (I / O
request). Mentioned the similarity may imprint on the
architecture of the machine - sometimes I / O devices included
in the scheme of the computer as a memory cell (but never vice
versa!). MSX In this way include one of the system ports,
managing the operational configuration of the machine (the
register of the secondary slots - memory cell 0FFFFh).
Typically, input devices and output devices have different
addresses. But even when the common use of the same address,
it may be that physical abuse at the entry and circulation in
the outputting to different devices. So, by writing to the port
any value, and then think its from the same address, we do not
always get the same value. The external device does not always
use all 8 bits. If the case is well known that in this readable
bits are insignificant, they are likely to be equal to 1. At
the conclusion insignificant bits can usually be installed in
any state.
Z80 CPU can address 64K (65536) I / O ports. However, for the
first 256 addresses, that is, using only the low byte address
bus, there is a greater variety of ways of addressing ports,
which led to a kind of "rule good manners - use 8, not 16-bit
addressing ports. In MSX-computers are generally respected.
Addressing UVV is direct - 8-bit port address is
the team; indirect - 16-bit address is placed UVV
a pair of BC.
Output data using direct addressing port.
Mnemonics - OUT (n), A, where n - 8-digit number (address)
port. This provides for the withdrawal of the battery. Port
Number exposed on the lower half of address bus, and the older
half of the contents of the battery is exposed, it is inferred
bytes. Bytes written, of course, exposed and on the data bus.
The emergence of bytes of data on part of address bus - a
non-trivial feature of the command OUT with direct addressing.
If the port address decoding is performed on an 8-bit addresses
Jr., excretion byte of data on older half address bus passes
unnoticed. (And otherwise - a vivid example in this regard so
far then excites spektrumistov when output port # FD leads to
simultaneous appeal to the AY-3-8910 and port configuration
# 7FFD).
Entering data using direct addressing.
Mnemonics - IN A, (nn).
The port number is displayed in the lower 8-bit address bus,
and the older half displays the contents of the battery, which
existed by the time of execution. Thus we can obtain 16-bit
direct-indirect addressing port. In the computer program
"Spectrum can be found, for example, such a construction: LD A,
# 7F IN A, (# FE).
In this way, the "Spectrum" is a survey of one of the series
keys. In the above construction actually reads from the port #
7FFE.
I / O using indirect addressing.
Full 16-bit port address is placed in a pair of BC, and the
command OUT (C), r, or IN r, (C). Data transfer between the UVV
and the processor may be using not only the battery, but also
registers D, E, H, L, and even register flags F. There is a
command IN F, (C), a flag is set by the result of reading from
the port, he received bytes in this case will not fit.
Teams IN C, (C) and IN B, (C) exist, but practical
their application is specific, since they modify the port
address.
Teams OUT (C), C and OUT (C), B rather useless, rather than
specific.
Important comments. In the mnemonics used (C), and not (BC),
For the above reasons, the "good tone", but addressing
by (C) is performed using all 16 digits pair BC,
no doubt about it.
Writing command IN (HL), (C) passes. But in fact it is
Team IN F, (C). This command IN (HL), (C) does not exist
and no team OUT (C), F.
In addition to the team IN F, (C), the other team I / O does
not affect the flags.
Command group input-output.
Something similar to LDIR there in the arsenal of IN and
OUT.Eto team INIR, INI, INDR, IND; OTIR, OUTI, OTDR, OUTD.
INIR performs N inputs from the port, the addressed register C
(one byte!), at (HL), inkrementiruemomu perfect for each input.
To register B organized the counter, working to reduce towards
zero. Alignment commands: (HL) <--- port (C);
B <--- B-1;
HL <--- HL +1;
if B = 0, then the conclusion, otherwise repeat.
At the output of the command flag is zero.
INIR use in the Spectrum is not possible, because the content
pair BC is still exposed on the address bus, despite the fact
that the register B serves as the counter.
INI performs a byte-input without looping. Monitor the status
of the counter - Register B - can be the flag of zero. When
achieve B = 0, the Z flag is set.
INDR and IND group operates in the input side of the decrement
of address by (HL).
Group output of commands OTIR, OUTI; OTDR, OUTD.
OTIR:
Port (C) <--- (HL);
HL <--- HL +1;
B <--- B-1;
If B = 0, then exit, otherwise repeat the cycle.
Command group O as well affect the zero flag.
[To be continued].
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