Nicron #11 12 декабря 1996

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Programming - a course of study assembler Wlodek Black, continued.

                                                         Z80

(Continued).

(C) WLODEK BLACK
             00Ah. TEAM shift.

The word "shift" perfectly captures the essence of similar 
operations. The contents of the register or memory cell one bit 
is shifted toward higher (left) or junior (right) discharges. 
Depending on what happens in this case with extreme (7-m 0-m) 
bits distinguish cyclical, arithmetic and other developments. 
There is also a very specific team BCD shift.

Teams shift are used in converting data from
parallel form in serial and vice versa, for example,
preparing them for transmission over telecommunications 
networks, with one bit processing data and so on.


              Cyclic shifts.

The mechanism of cyclic shift to the left as follows:

                   ------------------->------------------
                  | |

                  | |

   Carry <------- D7 <- D6 <- D5 <- D4 <- D3 <- D2 <- D1 <- D0 
<- Bits shifted to the left; bit 7 becomes bit 0, while

copied into the carry flag C. It is easy to imagine the origin 
of the name "circular" for such a shift. Register bits really 
move in circles, and extreme bits along the way copied to sign 
the transfer. A similar shift to the right:



    -> D7 -> D6 -> D5 -> D4 -> D3 -> D2 -> D1 -> D0 --------> 
Carry 

   | |

   | |

    --------------------<---------------------
The basis for the mnemonic commands rotate with a branch
a sign of the transfer - RLC (Rotate Left and to Carry) and 
RRC. Addressing - all the possible options: RLC A RLC H

RLC B RLC L
RLC C RLC (HL)
RLC D RLC (IX + nn) - 4-byte command.
RLC E RLC (IY + nn). Just for RRC.

Significant detail: the battery has a shorter
Team RLCA and RRCA. These single-byte command got a Z80
inherited from its progenitor Intel 8080, which shifts can be
was performed only in the battery. Teams RLCA and RLC A -
different. RLC A - double-byte command processor Z80; in this
command the battery acts as an equal among equals, the other
registers. RLC A applies to all flags and RLCA - only on the 
flag transfer. More (except, of course, length and time of 
execution) these teams are no different.

RLC and RRC, performed for other registers and memory, also 
affect all the flags. Flag of the P / V reflects the parity of 
the result. 


     Shifts through the sign of the transfer - "ordinary" 
shifts. 

"Ordinary" they can be called based on the fact that they 
contain only a mnemonic symbol and shift its focus: RR, RL, 
RRA, RLA. 

        --------------------------->---------------------- -
       : |
RL:: |

        --- Carry <- D7 <- D6 <- D5 <- D4 <- D3 <- D2 <- D1 <- 
D0 <- 

    ---------------------------<---------------------- -----
   | |
RR: | |

    --- D7 -> D6 -> D5 -> D4 -> D3 -> D2 -> D1 -> D0 -> Carry -
In the shifts of the type RR and RL carry flag is included 
consistently in overall chain of bits.

There are teams RLA and RRA, which features
have the same nature as that for RLCA and RRCA. With the flags 
of things as well. 


   The following types of shifts in the processor 8080 were not 
implemented and only appeared in the Z80. Therefore, for them 
there is no privileged form in relation to akkumulyatoru.Vse 
below commands allow any addressing and apply to all flags.

Flag of the P / V represents parity.

Left shift type SLA:


      Carry <--- D7 <- D6 <- D5 <- D4 <- D3 <- D2 <- D1 <- D0 
<--- 0 

SLA moves the byte to the left, bit 7 is put forward in a sign 
of the transfer; Bit 0 moves into a 0.


Shift to the right type SRA (read as "Es-Er-Yo):

      ->
     | |

     | |

      - <-D7 ---> D6 -> D5 -> D4 -> D3 -> D2 -> D1 -> D0 ---> 
Carry 

SRA shifts the byte to the right, bit 7 is copied to itself and 
also extends into neighboring bits 6, that is, how would 
multiply the 0-th bit is put forward in a sign of transference. 
SRA is not a mirror image of the SLA. 

A shift in the type SRL exactly they are:


        0 ---> D7 -> D6 -> D5 -> D4 -> D3 -> D2 -> D1 -> D0 
---> Carry. 

At this bit-shift command group is exhausted.

          BCD shifts RLD and RRD.

RLD: --------------->-----------------
                          | |

                          | |
A: D7 D6 D5 D4 D3 D2 D1 D0 (HL): D7 D6 D5 D4 D3 D2 D1 D0

   ___________ ___________ ___________ ___________

     not amended. | | | |

                      | | | |

                       ----------<-------- ----<---

RRD: ------>------- ---->-
                           | | | |

                           | | | |
A: D7 D6 D5 D4 D3 D2 D1 D0 (HL): D7 D6 D5 D4 D3 D2 D1 D0

    ___________ ___________ ___________ ___________

      not amended. | |

                      ------------------<-------------------

This intricate shifts more like sending chetyrehbitoyh groups 
between the battery and memory. In the RLD are moving in a 
circle: the lower half of the cells, addressable by (HL), - in 
the upper half, the former 4 bits of the upper half - in the 
lower 4 bits are the battery, the former junior 4-bit 
accumulator - the junior half of the (HL). In RRD motion 4-bit 
groups (HL) is right - the upper half is moved to place the 
younger, the younger half goes into the battery, and the lower 
half of the battery, took the elder half of the (HL). RLD and 
RRD affect the flags Z, P / V, S, starting from the contents of 
the battery. Flag of the P / V represents parity. C flag is not 
changed. 

The shift operation USPH (User's Shift by Phase) - a phase 
shift in user.

Occurs at the end of the day after an unsuccessful attempt to 
go to understand that is RLD.

But joking aside, as:
Regarding the use of such a fantastic team, both RLD and
RRD, then, in addition to dubious binary-decimal arithmetic (not
I know, never tried and do not intend to try), they are 
effective in problem of printing 64-character strings on a 
32-character screen Computer Spectrum. More me nowhere to stick 
them failed. 

[To be continued].