Hardware - ZX-ВUS: If you decide to make a normal computer out of your Spectrum, then this article is for you.

                                        
 (c) LD, (c) DANGEROUS        
                              
 ZX-BUS. Ending (possibly).          
                                        
 If the first part of this article was
very lengthy and rich epithet -
mi, then the second one will be very dry and hot
much more technical.                
 If you, after weighing all the pros and cons, decide
Is it possible to make your Spectrum normal?
new computer, then this article is for you.   
 To produce a bus former
requires several cheap distribution
nny microcircuits.  In choosing a series of micro-
schemes should always strive for more
fast-acting. Among domestic ones -
the best option is series 1533, but it is possible
and 555. We do not recommend installing microcircuits
produced by the plant "Svetlana" (series
555, logo in the form of the letter "C" in a circle -
ke, or without a logo at all), since
they are the most unreliable among domestic
nykh. In general, try to find them-
tailor analogues, since practice is
said that even the most worn out by him-
a tailor's microcircuit is more reliable than a new onehonest (patriotism is inappropriate here -
after all, you do it for yourself).                 
 Correspondence table for the used micro-
Russian schemes and their bourgeois analogues are given
on below:                                
                                        
15ЗЗАПб  = 7ХLS245, 7ЧALS245, 74F245    
15ЗЗКП15 = 7ЧLS251, 7ЧALS251, 74F251    
15ЗЗЛЭ1  = 7ХLSO2, 7ЧALSO2, 74F02       
                                        
APb microcircuits are especially common -
available in IBM PC boards of all configurations... 
Therefore, if you or your friends 
is there a living or dead board 386 - feel free
Solder the APb using a gas stove!
                                        
   No panels for microcircuits!!!   
Everything must be soldered tightly, otherwise
you get stuck with glitches. Although, if you can
get the so-called "collet" sockets - mo-
feel free to put them up;  refusals in this
case will not happen.                        
 We recommend placing near each m/s
blocking capacitor 0.1 µF. About
buffers (APb), capacitors must be installed
interesting!                               
 The slot for peripherals is the same as in Skor-
peonies and Kayakh - SNP-15-96, so blue,
with double-row arrangement of contacts
lamella  Use a similar one
tailor connector is highly not recommended,
since its pitch between the slats is not
complies with the domestic standard. 
(all periphery is produced in lamella increments
lek 2.5 mm, whereas in all imported
products use a pitch of 2.54 mm. At 30
contacts will run 1.2 mm, and you will need
become a sniper to manage
insert the card into the slot so that no
what was not closed. So ISA connectors
from your favorite 386 board will not fit, and
the calling plate is inappropriate here :)          
 Domestic connector can be purchased at
market, or by mail from St. Petersburg ZX companies.
 It should be noted that this connector is not
much longer than necessary, so from
the excess part is cut off (which
can be successfully used for
drive connection).                 
                                        
 Here is a diagram of the bus driver.       
                                        





























                                        
Примечания к схеме.-------------------                     
                                        
1. The diagram has two signal buses,
   line (left according to the diagram) there is a micro-bus
   processor (it also contains
   signals that are generated internally
   them computer circuits);    second
   (right) there is an external bus that
   goes to peripheral devices.     
   The signals on both buses are called single
   finally, only to the signals coming out
   to external slots, written on the front
   "." (dot).                         
2. Some signals entering the external
   bus, are internal for
   of the described device, they do not output
   are connected to the bus connector(DDIR, SKP, VC).
3. In the column "pin"  the number of the leg is indicated
   Z80 microprocessor, for some
   signals there are "-",  indicating
   that this signal is generated by the circuit
   microprocessor environment, for different
   computers it is made differently.  
4. Next to the "pin" column there are columns
   "name"and "bus", the names are indicated in them
   signals (abbreviated) and number of con-
   slot clock corresponding to this
   signal.                             
5. As microcircuits included in this
   device, can be used
   van microcircuits seriesK555 and KR1533,
 and the second is preferable.      
6. Some signals output to the bus
   are not used by any of the existing
   ing peripheral devices.  But this
   doesn't mean they aren't needed.  Market
   the periphery is constantly expanding, and,
   quite possibly some of these
   signals will be used over long distances
   neyshem.  These signals include:
 NMI, INT, BUSRQ, CROM, CRGE, RAS,
 DOS, DCGE.  Some of these signals are used
   used in the controller SMUC,  which
   This one connects exclusively to
   Scorpios, so if you want
 use it, it’s better to separate everything
   signals.Pin layout on standard
expansion slot.  As already stated,
the slot is a SNP connector...   
The connectors on the bus should be positioned this way:
please ensure that all expansion cards are
returned parts to one side. Distance
The gap between the connectors must be at least
less than 3 cm, otherwise gastrointestinal tract may occur
rity conflicts between peripheral
cards.                                
 The pinout of ZXBUS slots is such that
signals of row "A"  must match
connectors so that a connection occurs
with slats on peripheral cards,
located on the installation side, and
row signals"B" - with lamellas with a hundred
rons of parts. For those who don't understand this
phrases - in accordance with the standard, on
peripheral maps lamella row  "A"
are located on the mounting side, and the rows
"B"  - on the detail side.             
 On the connector, the numbering of contacts starts -
goes from left to right if you hold the connector
with the leads down, line “B” towards you.       
                                        
                                        
 Design notes.              
 -------------------------              
                                        
 If your car already has
expansion slot (SCORPION, KAY), then
connection comes down to connection
input (left according to the diagram) device bus
with the bus of the computer itself (contact in
contact), while the output bus of the device
swarm (right according to the diagram) becomes her
equivalent and is output to the slots of the
expansion. For these computers in the circuit
no need to climb into the car itself!  All necessary
what you need is already output to the system bus. 
 If you already have a bus expander
by Scorpio, then we can place our
diagram on it, having first deleted everything
local microcircuits.                    
 If your computer does not have a slot,
you need to find all the signals required
this device, connect them to the left
(according to the diagram) by the device bus, and the right
(according to the diagram) bring the device bus to
slots.  In this case it is necessary to use
wires of minimum length.              
 Almost all signals required by the device
vom, removed directly from the legs
Z80, only some will have to be formed
vat specially.  To signals requiring
separate approaches include:          
                                        
 IORQ, IOGE, NMI, INT, BURQWAIT, CROM, CRGE, RAS, DOS, DCGE.     
                                        
 The signal DCGE is relevant only for Ckopnu-
she and Kaya, owners of the remaining cars
instead it must be sent to the device
signal "general" (GND).                   
                                        
How to create the rest on your computer
signals, shown in the figure:           
                                        




















                                        
Notes for this diagram.                
                                        
 All resistors - 360...430 ohms.          
                                        
 By the inscription "to the ZX scheme" mean-
The following is true. There is a microprocessor leg
ra, let's say, the first one according to the scheme is "WAIT". 
The diagram shows that the signal going to
this leg must be cut (in the diagram-
me cross). Further to the place of rupture of the vpa-
a resistor is added, the result is -
signal "WAIT". Please note that this signal
taken directly from the processor's foot. That. on
line "WAIT" of the processor is only resistive
torus and wire connecting the "WAIT" line
with tire extender. Similarly with other
with our signals.                           
                                        
 Microcircuits RAM - these are K5b5RU5 microcircuits
or K5b5RU7 installed in your computer
pewter.The signal DOS should be in every machine.
It may be called DOS, EDOS, DOSE,
DOSEN, CSDOS, DCDOS or something else. 
If you were unable to find such a signal
on the diagram, do this (if there is no diagram
in general, you track the tracks on the board): 
in the disk drive controller environment diagram
looking for m/s 1SSLA2/5SSLA2/15ZZLA2/531LA2,
her eighth leg must go to some
TM2 chip (possibly between LA2 and
TM2 is worth something else).  One of you
The moves of this TM2 are the DOS signal.       
There is another way to search for this signal:
in many cars it goes to 1 leg m/s
27512 or participates in sample 27256, and
also in switching the IORQ signal.         
                                        
With the ROM sampling circuit (ROM) of your computer
There may be some minor problems with your computer.
If your car has one m/s installed
27512/27C512, then everything is simple, according to
scheme. It is made with some excess
ity, but will suit any option.
If your computer has several m/s
ROM (options: 2764, 27128, 27256, RF2),
then you need to find the control signal (CS  or
OE),  общий для всех ПЗУ,  установленных
в машине.  Далее так, как показано ниже:
                                        
 там, где
 написано
  "так и 
   было",
 подразу-
 мевает- 
 ся "так 
 и оста- 
  вить". 
  Резис- 
 тор, как
 and before 
 de, 360.
 ..430 ohm
         
         
         
                                        
 The signal "CS/OE" means
Of these signals, which one turned out to be common
for all ROM chips. At the same time, the combination
The size of the ROM chips does not matter (can-
Maybe, for example, stand m/s 27256 in the computer
Yuter and two 2764 or one 27128 in con-
rollerball, or something else).           
 The received signals CROM and CRGE are output -
for once.                           
                                        
 About possible glitches.                    
---------------------If after connecting this device -
After the computer began to malfunction, it was possible
possible, this is due to congestion
Z80 buses inside the computer itself;  at
this additional load in the form of micro-
The buffer circuit has run out of patience
microprocessor.  According to your passport, any
the Z80's stroke is required to last only one TTL-
entrance; in most Spectrums it pulls
up to ten... If the car is also "turbo",
the situation is getting worse.                  
 There is only one way out - replace the microprocessor with
more powerful/faster.   We recommend
Z84C010PEC,  and Z84C008 or 006,
if you couldn’t get them, it will do
Z80Н (Z84008).                          
 In most cases, when replacing the pro-
not only do frequent glitches disappear
(the machine does not work for more than a minute), but also
rare ones disappear (once a week the car
hangs for unknown reasons), i.e. by-
computer reliability increases.         
                                        
                                        
 In conclusion of this article, we present
the meaning of each signal is standard
ZX tires. It maywill come in handy -
workers in the periphery, as well as everyone,
learning the basics of microprocessor technology.   
                                        
A0...A15                                
 ADDRESS BUS 0 ... ADDRESS BUS 15   
 - output.                         
     Microprocessor address bus, 16 bits
     active logical level is "1".
     Can be either in a state
     output, either in inactive (high-
     impedance, or third state)
     via this bus the microprocessor communicates
     is consistent with the rest of the computer circuits,
     with which memory cell or with which
     it is now working as an input/output port
     melts.                              
                                        
D0...D7                                 
 DATA BUS 0 ... DATA BUS 7.         
 input/output.                        
     Microprocessor data bus, 8 bits.
     active logical level is "1".
     May be in the following states:     
     input, output, inactive.           
     On this bus the microprocessor receives
     writes or transfers a byte into memory or
     input/output device.           
                                        
RES                                     
    RESET, reset. Entrance.                
     Microprocessor reset line.      
     Active logical                
     level - "0". (this means that
     the "reset" function is activated when
     yes, when there is "0" on this line).
     interrupts are disabled when reset
     and the microprocessor begins to execute
     program from address #0000.          
                                        
NMI                                     
 NON-MASKABLE INTERRUPT.            
 Non-maskable interrupt.          
     Entrance. Active logic level -
     "0".  The microprocessor responds to
     transition from state "1" to state
     setting "0" at this input.  At the same time
     the command is generated internally
     CALL #0066, i.e. processor start-
     cannot execute non-massive subroutine
     triggerable interrupt located
     from the address #0066. In this case, the current
     main program execution address
     is stored on the stack.  On the Spectrum
     this input is affected by the button
"MAGIC".                           
                                        
INT                                     
     INTERRUPT, interrupt. Entrance.       
     The active logic level is "0".
     Analyzed on the last beat
     each command executed.  When
     When "0" is detected, an interruption is performed
     in accordance with the established
 new interrupt mode (commands
    IM 0, IM 1, IM 2).  Reaction to request
     ros interrupts may be blocked
     commanded by the DI command and enabled by
     mandaEI.                         
                                        
BURQ                                    
    BUSRQ, BUS REQUEST,bus request.   
     Entrance. Active logic level -
     "0". When a "0" arrives at this
     input processor ends current
     machine cycle (no more than 6 cycles)
     and transfers the address bus, data bus
     lines and lines IORQ, MREQ, RD, WR  in
     inactive state, thanks tomu external device that issued
     this signal can connect to
     microprocessor buses instead
     and access memory and ports
     I/O directly, emulating
     microprocessor                    
                                        
BACK                                    
 BUSAK, BUS REQUEST ACKNOWLEDGE,    
 Acknowledgment of the bus request.  Exit.
     The active logic level is "0".
     Indicates the device that sent
     BUSRQ,  that the buses are free and you can
     connect to them.                
                                        
WAIT                                    
     Waiting. Entrance. Active logical
     level - "0".  One is being interviewed
     times per machine cycle and serves to
     "stretching" this cycle. If,
     for example, memory does not have time to produce
     data required by the microprocessor,
     The memory manager must set
     this signal is “0”, and the processor will
     wait for the transition to state "1",
     freezing the current cycle.  When pa-
     The memory will be ready to output data,
     its dispatcher removes the signal WAIT,
 letting the processor know that the data
 ready.                            
                                        
M1                                      
     MACHINE CYCLE 1,  op code sampling
     walkie-talkies from memory.  Exit.  Active
     logical level - "0".  When you-
     The operation code is set
     to "0". When reading prefix commands
 (#FD #??, #DD ??, #ED ??, #SV ??)  
 Set twice (three times) per
     command, also accompanying the reading
     prefix.                          
      Also set to "0" when
     interrupt acknowledge cycle,
     simultaneously with theIORQ signal.      
                                        
RFSH                                    
    REFRESH CYCLE, regeneration cycle.   
     Exit.  Active logic level
     "0".  Makes it clear to other schemes
     computer that is in the current cycle
     memory is regenerated and
 the number on the address bus is the address
     regeneration.HALT                                    
    HALT STATE,stop state.    
     Exit.  Active logic level
     "0". By command "HALT" microprocess
     sor sets "0" on this line
     and waits for an interrupt signal, which
     ry will bring him out of the state of remaining
     new and will remove this signal.         
                                        
RD                                      
    READ, reading. Exit. Active log-
     ical level - "0". With this signal
     the microprocessor makes it clear that it
     reads memory (together with MREQ)
 or reads the port (together with IORQ).
                                        
WR                                      
    WRITE, record. Exit.  Active lo-
     logical level - "0". This signal
 scrap microprocessor makes it clear that
     it writes to memory (together with MREQ)
 or writes to the port (together with IORQ).  
                                        
MREQ                                    
    MEMORY REQUEST,memory request.     
     Exit.  Active logic level
     "0". With this signal the processor will inform
     It's clear that it works with memory.   
                                        
IORQ                                    
    INPUT/OUTPUT REQUEST, input request/
     output. Exit.  Active logical
     level - "0".  This signal pro-
     The processor reports that at this moment
     ment it works with input ports/
     output.                            
     This signal is also set
     (together with M1) in the confirmation cycle
     detecting a maskable interrupt.     
                                        
IOGE                                    
 IORQGE,sometimes IORQCE.  INPUT-OUTPUT  GATE ENABLE, resolution
     working with internal ports
     ZX-SPECTRUM. The entrance to which the external
     the device must supply it there
     either "1" or do not submit anything
     (impedance), for example, through circuits
     "open collector", "open
     emitter", as well as through m/s with "tre-
     this state."                   
     The external device must set
     "1" on this input if it sees,
     that the processor is accessing it.   
     Thus, sampling is prohibited
     internal ports of ZX-SPECTRUM when
     accessing a port connected
     via the bus, to eliminate the possibility
     no simultaneous sampling.         
                                        
CROM                                    
    CHIP SELECT ROM, sampling internal
     th computer ROM. Exit.  Active
 logical level - "0".          
     The computer circuit is connected with this signal
     indicates that the processor is reading memory
     in addresses #0000...#ЗFFF, at which
     The ZX-SPECTRUM contains ROM.CRGE                                    
    CSROMGE, sometimesCSROMCE.           
     CHIP SELECT ROM GATE ENABLE, enabled
     Sampling internal ROM.     
     Open emitter input.           
     The logic of operation is similar to the signal
    IOGE. When the signal is active CROM
 external device can set
     "1" on CRGE, thus prohibiting
     work with internal ROM and installation
     the swarm can substitute the computer
     your ROM as internal.    
     Can be used for sub-
     new ROM with its own program
     button boots "MAGIC".              
                                        
RAS                                     
    ROW ADDRESS STROBE,RAM-specific
     internal signal.  Exit. When using
     use must be buffered
     van.  Can be used as
     justsignal with a frequency of 3.5 MHz.  
                                        
DOS                                     
    DCDOS, sometimes EDOS or DOSEN.      
    DOS ENABLE,DOS selection. Exit.    
     The active logic level is "0".
     Shows that at the moment
     hangs as ROM on the processor
     TR-DOS ROM, as well as open ports
     TR-DOS.  When connecting peripherals -
     devices level "0" on this
     output should prohibit their activation
     tion, otherwise your device may
     intersect with TR-DOS ports.       
                                        
DCGE                                    
     Sly Scorpio-specific signal.
 Indicates that currently
     Bank 0 of RAM is connected instead of ROM.
                                        
+5V                                     
     Food.  When connecting external
     pull the devices as far as possible
     with a straight wire.GND                                     
     General wire. Also pull maxi-
     very thick wires.         
                                        
---------------------------------------
                                        
                                        
 A small ANNOUNCEMENT on the section "HARDWARE"  
for the following numbers.                  
                                        
1) Exchange with external devices. Komen-
   tary to the DDIR signal (direction
   data) in the bus buffer circuit.         
                                        
2) Operation diagrams Z80.Cycles, cycles and
   etc. information.                     
                                        
3) Description of all ma-
   buses and peripheral cards with details
   their analysis.                     
                                        
4) Description of logical  probe  for
   digital  TTL signals,  allowing
   look into the world of internal processes
   computer that makes it easier to find faulty
   equalities, adjusting your own con-
   ruktsy. This device is mostly
   cases successfully replaces the oscilloscope,
   not to mention the tester (of course,
   applied to digital signals).  
                                        
5) Perhaps some articles "for
 beginners" about digital technology in the world
   connecting devices to the Spectrum, and
   also, perhaps, about the Spectrum itself.