Optron #06
09 января 1998

NMI / INT and others - The problems of c interrupts NMI.

<b>NMI / INT and others</b> - The problems of c interrupts NMI.
           / NMI, / INT, and other



From: Klimov Vassili (# z80, nick BACbKA)

(C) Klimov Vasiliybleme interrupt work on / NMI and all that 
with this connected.


  I will not grovel for a long time and, therefore, go directly 
to the case. So, I would single out The following problems 
arise when processing nonmaskable interrupts: 


  1) preservation of the main registers;

  2) determination of IFF (trigger interrupt);

  3) the correct operation of the register R;

  4) determining the interrupt mode (IM 0
1, 2);

  5) unacceptable deterioration of memory cells;

  6) to determine the number of the included page;

  7) sinronizatsiya with maskable interrupt (immediately and 
the screen number); 

  8) recovery of all memorized and higher launch;


  Now everything in detail. Step 1
and 4 are solved not so difficult it here
go about the rest. In order not to spoil the memory, enough for 
treatment to a procedure NMI processing to include instead of 
ROM shadowing RAM (as suggested Sergei Tyatin), then

program will look like this:


        org # 0066

        ld (Stack), SP

        ld SP, Stack

        push AF

        ld A, I

        push AF

        ... , And saved
        ... ; Of registers

        ... ; Through the stack and op
        ... ; Definition mode

        ... ; Interrupt

        defs NNNN
Stack defw 0


  But that's not all. Case that
after the arrival of NMI and validation (/ M1 OR
/ IORQ) = 0 on the stack is stored return address
in the interrupted program. Sergey said,
that it is difficult to solve. I propose to write the address 
is not on the stack, and a pair of 8 bit registers (this is not 
is easy, but with a soldering iron to run have :-)) (Rasp: 
could you write more specific, as it should be run, and then I 
see it only in general terms and reinvent the wheel is not very

hunting).

  Now for the expansion port. Apparently, once the Pentagon 
declared a standard, then memory expansion up to 512kb Pentagon 
should support (for those who do not knows: through bits 6 and 
7 of port # 7ffd). But because actually there are machines with 
more memory 512kb (I have, for instance, profiles), we urgently 
need somewhere to shove, this is not the way (?) appeared bits. 
Who has the ideas to write. (Rasp: There is one idea: to use 
the 5-th bit port # 7ffd, blocking the port # 7ffd not very

and need - THE PROGRAM Only 48K is not bad going
through the so-called, USR 0). Further, naturally, you need a 
port for reading # 7ffd (And if you schityvete return address, 
then for him, too, need a port). Here I can offer (all probably 
already got) Port # XXfd so as not to conflict with AY

(Rasp: if a program uses virtual kakoenibud ROM or RAM, you can
to make the ports accessible only from this
virtual memory, such as it is
made in the controller Beta Disk). As the comments say that the 
Scorpio system ports can be read by AY (although earlier 
versions, I think, stood an oak definition pages by comparing 
them). 

  Now let's talk about INT'e. In principle,
here and say there was nothing, just, in my opinion, it is not 
used anywhere (there is owing to the shadow monitors). Simply 
define the number of cycles between the arrival / INT'a and 
when you call / NMI cycle to consider joining maskable 
interrupts (along with this can be arranged to determine their 
type). About run see below. You may be

question: why is it necessary? And I say: do not
I know:). But this is not a bad thing to ... Yes,
I almost forgot, you can make
interrupt the CPU / NMI through several cycles after the / INT: 
reduce the number of calculations, and restart the program it 
will be easier. 

  Now about the last paragraph (honestly
speaking, I was tired of writing it is time
call it a day). Well, I do not know how to do it, I do not 
know: (. It all rests in the memory, will likely be no 
interruption of the program executed in the ROM (and BASIC48 
just there and works), but when run from the shadow RAM to 
replace it on the ROM. on that my ideas on this topic had been 
exhausted. 

  Now a few words about "multitasking."
In fact, under the multi-tasking means in parallel (in the 
sense of sequential switching between them) the execution of 
several programs (see below). In fact, we have several programs 
that sit in memory, with a small driver can switch between them 
(MagOS). Make it more "cool" MagOS on the Spectrum

help us to ideas that are listed above.

  And at the expense of multi-tasking, then the case here
in hardware. Can, in principle, to make that
same MagOS, but the signal / NMI will be generated by a timer 
and will not switch screen (how to do it - is another question).

But it's all in the future (and whether it will ...).

  So in conclusion, that all ideas,
The above may be freely used, but with only one condition: the 
need to standardize everything, otherwise ... 

  Bye everyone, see you at # Z80 (also waiting
questions and answers in the pages of newspapers).

  Those who believe the above nonsense
I can advise to press RESET.


  P.S. 9/12/1997 Perm.


  P.P.S. KEEP SPECCY ALIVE!!







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