Shocker #01 20 января 1998

Железо

Iron - wiring diagram ISA slot to Spectrum.

          C X E M O T B. Since MG



        CONNECTING IBM'OVSKIH CARDS


    Landslide podeshevlenie PC-periphery
changed the approach to refine SPECCY.Zachem
each time to climb inside the machine, if you can once and 
forever connected to the bus slot of a computer from IBM and 
paste it almost any long-tested device: modem, mouse 
controllers, 1.44 - drive, hard drive, printer port, SVGA

map, SOUND card, etc.

    This scheme is apparently the simplest
shy of reasonable ways to connect ISA
Slots - without DMA, interrupt controller and
high data byte. Virtually all
IBM ports are 8-bit. To 16 bits
a rapid exchange of data with the IDE -
VRAM HDD and the majority (
but not all!) SVGA kart.Po this at
reason for 90% of the applications you have enough below the 
scheme. 

    Zarezervirovanna ability of these improvements the scheme 
if it someday be necessary. 

                 (MAP)


    Addresses are connected to the Z80 CPU
addresses the same name on the slot: A0 ... A13
CPU SA0 ... SA13 (contacts "A" 31 ..
. A 18).

    The data bus connects the processor with
homonymous data slot: D0 ... D7 Z80 with
A 9 ... A "2 (SD0. .. SD7).

    RES Z80 signal is inverted and fed to the contact "B" slot 
2. If not free inverting element,

best use of additional
LP5 - its other findings need to
signal to the TV with SVGA
card.

    RFSH signal with the output 28 is fed Z80
to contact REFRESH ("B" 19) slots.

    If the WAIT signal on your computer
simply connected to +5 V through a resistor, then
enough to connect WAIT (conclusion 24 Z80)
with contact IOCHRDY slots ("A" 10). Otherwise, the signal WAIT 
to the Z80 should be pass through the cell and, at the second

whose input is fed IOCHRDY contact with "A" 10 slots. Postavte 
1K resistor between this input "AND" and +5 V. 

    Also, resistors 1K to be put
between +5 V and contacts BALE ("B" 28),
MEMRD ("B" 12) slots. Contact AEN ("A" 11)
must be connected to "ground".

    Signal DOS high level signals the controller drive. In
"Pentagon" is the pin 8 D76. Signal IORQ
taken directly from the output 20 Z80.

     EIORQ signal is fed into a computer
instead IORQ.

     The supply voltage is applied to the following contacts 
Slot: +5 V - on the "B" 3, "B" 1929; +12 V - the "B" 9; GND - 
the "B" 1, "B" 10, "In" 31;-12V (for the modem, mouse) - the 
"B" 7; -5V (not normally supplied) - the "B" 5. Other contacts 
slots are not used. 

     Instead, IR35, in her absence,
TM9 can set the skip bit is D5,
D6 (D4).

     When you connect your TV to SVGA
card clock signal generated on
LP5 element of the upper and lower human clock (output cards 
are connected, respectively, 13 and 14). Signals R, G, B 
respectively, removed from the outputs 1,2,3 through resistors 
to 1k or opto-couplers to prevent damage to the card. 


    Operation. Ports maps have
the same address as on the IBM. That there was no
conflicts with the ports SPECCY, the last
blocked the installation of 7-th bit port
 # FFF7. At the same time allowed an appeal to
IBM-port cards. Naturally, the port
 # FFF7 SPECCY not locked (on the map
No port with that address).

    Bits 0 ... 5 port # FFF7 emulate the old
Chiyah (A14. .. A19) address bits of RAM cards,
which can only record the information through the address space 
# 0000 .... # 3FFF SPECCY.



    At H & M A N I E! On the boards, "the Pentagon's 128" has a 
serious bug - if attempt to record addresses ROM, it puts the 
data onto the bus. Therefore, in these machines heats up the 
processor and even ROM ( that constantly writes to its address

due to an error in the firmware). Fix an error on the board 
pretty easy - just instead of "land" to file the 20-th output 
ROM RD signal from the processor. If a card with

which you work has its own memory, then
this correction to make sure.


    The content and style preserved.



    For those who do not understand how there are
contacts on the slot, bring their full wiring passed us by 
modem from Peter: 



        GROUND B 1 A 1 I / O CHCK

        RESET B 2 A 2 SD7

        +5 V B 3 A 3 SD6

        IRQ2 B 4 A 4 SD5

        -5V B 5 A 5 SD4

        DRQ2 B 6 A 6 SD3

        -12V B 7 A 7 SD2

        OWS B 8 A 8 SD1

        +12 V B 9 A 9 SD0

        GROUND B10 A10 I / O CH RD

        SMEMW B11 A11 AEN

        SMEMR B12 A12 SA19

        IOW B13 A13 SA18

        IOR B14 A14 SA17

        DACK3 B15 A15 SA16

        DRQ3 B16 A16 SA15

        DACK1 B17 A17 SA14

        DRQ1 B18 A18 SA13

        REFRESH B19 A19 SA12

        CLK B20 A20 SA11

        IRQ7 B21 A21 SA10

        IRQ6 B22 A22 SA9

        IRQ5 B23 A23 SA8

        IRQ4 B24 A24 SA7

        IRQ3 B25 A25 SA6

        DACK2 B26 A26 SA5

        T / C B27 A27 SA4

        BALE B28 A28 SA3

        +5 V B29 A29 SA2

        OSC B30 A30 SA1

        GROUND B31 A31 SA0


                 LL1
1 A12 I A14 4 June 1915 I 6 / IOWR ('B13)
A13 D A15 2 5 / WR 3 D 5 / IORQ ('B14)
A14 March 7 / RD April 13

      4 / MREQ 14
A3 5
A15 6 July 1, 1910 MEMWR ('B11)

                        2


    LL1 D0 13 I
/ IORQ March 1 D1 14 R
DOS 2 D2 3 August 1912 SA14 ('A17)

          LL1 D3 5 July 1915 SA15 ('A16)
/ IORQ Aug. 10 / EIORQ D4 4 September SA16 ('A15)

       9 D5 June 3 SA17 ('A14)

                     D6 17 May SA18 ('A13)
/ WR D7 February 18 SA19 ('A12)

              12 / RES 16 January RESERVE
555ID7, 13 November 11, 1919
555ID4, LL1
555LL1.


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