Programming - about the unknown (internal) register of the Z80.

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(C) Tyatin Sergey                          
                                          
 We will talk about the unknown Z80 register
(Rasp: I would call it not just a re-
hyster, but internal register, since
working with it directly in software
means not possible).Unknown to us-
only that it doesn’t even exist
hint in any literature known to me
re.  And this is not surprising
since it is used only when calling
ve non-maskable interrupts. As is known
Z80 has three masking processing modesinterrupts that are set by command
dami IM 0, IM 1, IM 2. It can be assumed
that inside the Z80 there is a register that
stores the number of the current maskable mode
interrupt, let's call this register IMR. From
Z80 documentation, IMR is affected by:       
               
 - signal /RESET ;IMR=0;          
 - commands IM 0, IM 1, IM 2        
       
 And! In addition, the IMR is affected by the /NMI signal
and the RETN team! The point is that in fact
In fact, the Z80 has two registers storing the mode
maskable interrupts IMR1 and IMR2. IMR1
really keeps cloaked mode
interrupt, and IMR2 is used for temporary
storage of IMR1 when processing non-mask-
interrupted. So, about the IMR2 register
has not been mentioned anywhere yet. A work-
it melts as follows (the following are mine
thoughts on this matter). Upon arrival
signal /NMI in IMR1 is written either 0,
or 1 (still more likely 0) which is the same thing
and also withstable data bus. A re-
The IMR2 registry stores the value of IMR1 until
the non-masking procedure will end
interruption.  When executing the command
RETN IMR1 is restored from IMR2,  
the interrupted program continues to work as
nothing happened.                       
 All of the above can be reduced to one
sign:         
        
 ┌─────────────────── ─────┬──────┬──────┐ 
 │ Action │ IMR1 │ IMR2 │ 
 ├─────────────────── ─────┼──────┼──────┤ 
 │ Signal /RESET │ 0 │ 0 │ 
 │ Command IM x │ x │ x │ 
 │ Signal /NMI │ 0 │ IMR1 │ 
 │ RETN command │ IMR2 │ - │ 
 └─────────────────── ─────┴──────┴──────┘ 
                                          
  This is all very similar to the IFF trigger and
I have a deep suspicion that IFF and
IMR are stored somewhere nearby, but this is
rika... I had to face this
phenomenon (i.e. IMR) when I wrote those
new monitor.  Inside the monitor I tried
determine the non-maskable interrupt mode,
but to my greatestsurprise (and
I suffered so much before I figured it out
what's the matter) the second type of interruption was not determined
vaniya. Correctly determine the interrupt mode
You can do this in this way:       
                                          
NMI_SR ; Entry point to subtitle    
 ; NMI processing        
                                          
 PUSH AF ; Standard start   
 PUSH BC                        
 ...........                       
 DI                                
 LD HL,IRUPT ; Installation      
 LD (#ХOFF),HL; vector       
; (The example is quite crude :-)            
 LD A,#40                      
 LD I,A  LD A,#56 ; Default   
 LD (TYPE),A ; IM 1           
; Setting the current mode            
 LD HL,TMP1                   
 PUSH HL                        
 RETN                               
TMP1                                      
; Now you can define the mode           
 EI                                
 HALT ;If there was IM 2,           
 ;IRUPT will be executed        
 ...........                       
; Restoring mode    
 IM 1 ;  is stored here      
TYPE EQU $-1; mode                
 ............   
; Output                        
 POP AF                       
 RETN; you can just RET       
      
IRUPT LD A,#5E ; IM 2       
 LD (TYPE),A            
 RET                      
                       
  I would be interested to know how to
The authors of the monitor struggled with this problem
for SCORPION (if they didn't know about IMR?). 
  In general, when using NMIs, they open
tempting opportunities. For example writing
'reliable' MAGIC, shadow monitors, many
state-of-the-art operating systems. For example,
I wrote a shadow monitor that locates
is stored in the upper memory and upon arrival of NMI
is stored in the upper memory and upon arrival of NMI
this onethe page turns back to the place of the ROM.
Then the monitor pushes all 128K
upper memory, saves all registers,
modes, in general, completely condition
computer, so even after overloading
the computer can be returned to where it was interrupted
place. And then in #17 the page is thrown
Stalker monitor and you can work with full
comfort.   The only glitch occurs
when the program being interrupted performs a re-
moving data blocks by stack, but this does not
You can't just get rid of it. But this is all to de-
Lu doesn’t apply... if there are questions pi-
sew, call.  You can also find me at
irc.funet.fi on channel #Z80 under nick
Z8OST.                                    
                                          
 21:39:29 7-10-97 Tyatin Sergey
                                          
Email: s9415519@polynet.lviv.ia           
Phone: (0322) 679210                      
                                          
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