Iron - port of #FF in Russian Spectrum clones.

Oberon #01
© A. Korolev                               
                                          
                                          
 PORT #FF ON RUSSIAN HARDWARE...     
                                          
                                          
This note is dedicated to the flashed
in SPECTROFONe article Kirill Gromov  about
"the computers we choose", in particular
information on the topic of the so-called attribute port
#FF.                                      
                                          
  I will warn computer owners in advance.
ditch, having such a “lotion” that they are in-
there is nothing to worry about, this note they can
read just like that - “for general development.”
 Well, the happy owners of "Leningradov",
"Moscow", "PENTAGONob" (and the author has this)
just have to read that they will be expected
give if they make "scheme from Kirill
Gromova"...                               
                                          
 The author of this article put the "port" circuit
to your sinner "PENTAGON-128", etc.
The following calculations are based on real data
data obtained during the study of work
devices.                               
                                          
  For the ignorant (i.e. those who have not read the article
K. Gromova v SPECTROFONe N15) - lyrical
retreat:                             
 Port #FF is a dummy external device
yours, existing on the proprietary SPECTRUM-48.
And this port is in SPECCY no one on purpose
did not develop, it was “formed” due to
originality of circuit design SPECTRUMa.    
  From a logical point of view, to this port
"supplied" color attribute code,
currently displayed time:
or otherwise (i.e. when video
the controller displays BORDER ) state
idle data bus (#FF byte).         
  I repeat, this is how the standard should “work” -
a strong "port" of attributes.                    
 Now about why the word "port" is taken into
quotes.  As stated earlier, this
the device is formed due to "gags"
circuit design:video controller and micropro-
The processor uses one common data bus. 
  When the user tries to read
port #FF, to the data bus none of the "laws"
"real" devices are not connected -
the data bus is in a free state
NI.  But it may turn out that at the moment
reading on the bus there will be an atri-code
Buta familiar place, it is he who will be
tan (or should be read).           
                                          
  In general, these rather strange things must
should happen and when you try to read it does not
only port #FF, but also any unused one
port on the computer.  I don't know why, but
port number #FF is the generally accepted number for this
exotic device.                 
                                          
                                          
 But, as they say, “let’s return to our ba-
wounds."  The author has great doubts that
in our country every "sinclairist" has
branded computer.  And therefore, in the father-
high-quality schemes (excluding SCORPION,PROFI
and maybe ATM-TURBO)  this device
completely missing, and from port #FF
The #FF byte is always read.  Those who wish to check
I can check my SPECCY for the presence of a port
give the simplestprogram in BASIC:
10 PRINT IN 255:" "::GOTO 10              
  If you run this program and see
those where the screen is completely filled with numbers
255 - know what your loved one has Spec-
truma problems with the attribute port, and some
other programs(SHORT CIRCUIT,ARKANOID 1),
which use the potential
port capabilities for synchronizing graphics output
ki, being launched on some domestic
real “self-made” will lead to “hanging”. 
                                          
                                          
The diagram shown inSPECTROFONe and on
in any case, displayed below, in principle
not operational.  But she was found
(as always!) some deviations in ra-
both. Therefore, as a real researcher -
hacker, I hasten to share some observations
observations on the operation of this scheme.          
                                          
 1. I'll start with the main thing: after installing the circuit
we port with the computer NOTHING BAD
IT HAPPENED that it’s already gratifying - if you want -
If you want to install this scheme, install it, it’s worse
there will be. 2. From port #FF, the “with pe-
with some success" #FF or color byte
attribute, as a “normal” port should
attributes.                                
                                          
 3. If you persistently read data from the port
#FF, having previously filled the screen with one
color (for example, frame and paper are black,
white ink, brightness and flicker off
cheny), then in addition to the intermittent values
#7 and #FF will "skip" and some other
then the meanings - for me, for example, in this case -
tea reads #7F.                         
  Having compiled a special analysis program -
torus, purely experimentally - after multiple
extensive launches, the following was obtained:
probability of reading "illegal" code
instead of a color attribute code, excluding
#FF values are approaching 1/192.       
  That is, on average at 192 "not #FF-meaning-
niya" accounts for one "illegal".        
Having experimented with screen color, also
I noticed patterns between
attribute byte and "illegal" numbers,
read from the port.                  
 For example, in addition to #7F, I read:
#5F,#77,#F7,#DF,#4F,#CF,#EF,#E7,#C7...    
At first I was perplexed, but the prospector
but having gone through all 256 attribute codes, the composition
Viv tables of correspondence between attributes
and readable "illegal" data, I
I guessed at the tip of my pen the reason for the “glitch”
this scheme.                               
 Let me explain: incorrect information from port
that #FF will be read at those moments in time
neither when the video controller is directly
goes from displayingBORDERato displaying
changing the address area of the screen (i.e. pictures)
ki), and when an attri-
familiarity boot from the left edge of the screen (0th
column).                                 
  Port register #FF (chip K5SSUP23),
connects to the data bus via the POLE signal
ATTR, which is active when displaying
attributes. Individual digits of this register
ra by signal POLE ATTR must connect-
to the corresponding bits of the data bus
AT THE SAME TIME, but we, living almost in the 3rd
millennium, we know that there is nothing ideal in the world
there is nothing special, and the register bits are naturally
but they are not connected to the bus at the same time,
but at different points in time.               
 Of course, non-synchronizationconnections
catastrophically small, but as it turned out,
it is quite possible that micropro-
the processor reads something that has not yet been formed
attribute, and the individual bits of that attribute
still remain installed. This glitch
completely depends on the specific chip
register.  For example, in my register there is a
The main “braking” bits are 0,1,2,6.  
Someone else may have something completely different. 
                                          
 A person experienced in circuit design will 
sits me: “And how do you generally function correctly?”
assign input/output ports, definitely
transmitting information and which consist of
the same registers?                     
... And I’ll answer that it’s a standard situation
reading from the input port in the microprocessor
system Z-80 is determined by active signals
microprocessorRD, IORQ,and state
address bus on which the address is located
input port.                              
The microprocessor makes hardware corrections
delay before reading information from
data buses are just for everything
data bits were able to form correctly
vat.  Input port, based on active signals
RD and IORQ, as well as the address on the address bus
connects its register to the data bus andprovides information as long as any of the
control signals will not become passive. 
                                          
  In our case with port #FF according to the diagram
Gromova, none of these signals
is the manager for the port register
attributes, and therefore this register "throws"
on the data bus attribute codes, absolutely
without caring whether he wants it at all
microprocessor read something from some
any port... Hence the "illegal"
bytes.                                    
                                          
                                          
                                          
I don't know, maybe on a proprietary one SPECCY
there are also similar incidents, but still,
if you want to use the port attribute
Comrade with such a realization, then accept to
note that it can be read
incomplete attributes.                        
 I take the liberty to say that
Kirill Gromov "forgot" one small detail
tal in his scheme, namely in his scheme
The microprocessor signal is not taken into account IORQ
 If you connect the port register to the bus via
two events (IORQ = 0 AND POLE ATTR = 0),
then the errors described above in the operation of the port
will disappear!                                
                                          
  In conclusion, I present an alternative
port diagram. 3a it was based on the diagram
from SPECTROFON N15.    If our Samara
the reader will want to put an attribute port,
then after reading this note, you can choose
from two options.   I think "ours"
option will be more correct.           
 You can make claims regarding the work of the “original”
send to Moscow, the author of this "lotion"
K. Gromov (if you find his address!).     
                                          
So about the scheme:                             
                                          
 Designations of input and output legs
microcircuits are given for the circuit  PENTAGON-128.
                                          
  Register input signals are connected
to the corresponding register outputs
video controller attributes.  Registration outputs
tra are connected to the micro data bus
processor through resistors (required!).
This connection is called "wiring"
OR", that is, ifdata bus is occupied by someone else
device, then this register will not be
conflict with other sources, and
will not distort information
on the data bus.                           
  Register clock signal connecting
connected to the corresponding clock input
video controller attribute register, and
the POLE ATTR signal is connected to IORQ  via
back-to-back diodes KDS22A, implementing
thereby connecting the register only in
the moment the microprocessor reads data.    
 It is better to take the signal IORQ from the microcircuit
DD5O (8th leg K5SSLE1) or even from
Z80 (20th leg).                         
 The signal POLE ATTR can be removed from the multiple
ksors for the formation of RGB signals (m/s D47,
2nd leg).                               
 The data bus must be
“pulled up” to +5V through 10 KOhm resistors,
but this is probably already in yours
computer. Смотрите схему:              
                                          
                                          
 ┌--┬--┬--┐         ┐         
 от ре- │ --3┤D0│RG│Q0├2--▓▓▓-- │ К шине  
 гистра │ --4┤D1│  │Q1├5--▒▒▒-- │ данных  
 атри-  │ --7┤D2│  │Q2├6--▓▓▓-- │(к 2,5,..
 бутов  ┤ --8┤D3│  │Q3├9--▒▒▒-- ├ DDЗ9)   
 (от 2, │ -13┤D4│  │Q4├12-▓▓▓-- │         
 5,..,19│ -14┤D5│  │Q5├15-▒▒▒-- │         
 DDЧO)  │ -17┤D6│  │Q6├16-▓▓▓-- │         
        │ -18┤D7│  │Q7├19-▒▒▒-- │         
        └    ├--┤  │  │         ┘         
от 11 D40 -11┤C │  │  │  R0-R7 (820 Ом)   
"C3" ├--┤ │ ├10 - корпус        
             ├--┤ │ │                   
IORQ ┼>┼┬--1┤OE│ │ ├20 - +5В           
от Z80  │ └--┴--┴--┘                   
                               
от 2 ┼>┼┴-▓▓▓---┐ R8 (1 КОм)             
D47,"C5",                        
POLE ATTR -┴-                       
                                          
Микрошема К5SSUP23 или К5SSUP22          
           
PENTAGON-128
микросхему профей м/с DDЧO,  подключив
parallel inputs, taktovy input and nutrition
к DDЧO, выходы 2,5,..19 подсоединяютthrough
resistors to the corresponding outputs DDЗ9
(it is located nearby - diagonally)  
signal POLE ATTR "C5" convenient to take from m/s
DDЧ7, located on the opposite dia-
drove from DDХО.                           
  As a result, the maximum length of the connector is
wires will be equal to 3 cm, which is very
relevant for the noise immunity of the system. 
  So do the circuit, enjoy
another small victory in the battle for
compatibility.                            
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