Thoughts on Wolf 3D and other super effects ZX + NeoGS In NeoGS (abbreviated as NGS), the function of the so-called "direct memory access" (abbreviated DMA), in which ZX Spectrum has access to NGS memory directly through some address range. Lord Vader wants to make anyone read addresses in this range caused the same cell to be read NGS memory, and then the pointer to this cell was incremented (this makes it easier for NGS to prepare for the next reading). I want convince him to do paging with compliance addresses. Although it will be more difficult for NGS, it is not the bottleneck here. and ZX (it is what displays it on the screen). If DMA to NGS memory is only with abtouhkpemehtom, then it is impossible use fast output of chunks (s2p) of size 2x1 in the mode "color per point" (ld hl,...:push hl). If consistent ZX memory addresses corresponded to sequential memory addresses NGS, then this c2p (more precisely, the numbers "...") would be formed by NGS (pop rr + ld (hl),r:inc h), and the ZX would output it (by doing directly from NGS memory) at machine gun speed. It's not necessarily chunks 2x1, any bytes can be there (for example, whenyou impose weapons). One page (16k) fits 64(Y)*~100(X) chunks. For a typical size of the active screen area (128x200) you need 2 pages. Just somewhere around this size there will be frame and construction (on NGS), and output (on ZX). On pure ZX without NGS I I use 1 page, but there are 2x2 chunks (i.e. I repeat lines). In the case of ZX+NGS you need to have two such c2p (one is formed, another is output). Frame ballquests are also possible do it through this engine, including with crazy scrolling backgrounds. In general, address matching is desirable. You can use a slightly slower ld sp,:pop:pop...:ld sp,:push:push..., then 2 times less NGS memory accesses (but 2 times more memory accesses ZX). What is the ZX brake when ZX accesses NGS memory? What about the NGS brake when treated like this? ld sp,... dup N pop hl:ld (...),hl ;this is faster than pop ix...push ix ;or eha:ror af...push af:eha edup ror af ror s roar ror hl exx ror s roar ror hl ld sp,... push hl push push exx push hl push push push af Total 175+N*26 clock cycles (N=(width-14)/2). 24 familiar places: 175+5*26 = 305. 305/24>12.7 clock cycles per byte (not counting pointer reset memory in NGS'e). This option can be used with abtouhkpemehtom.
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