Terminal #03
28 января 1998 |
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Program - Programming LSI controller KR1818VG93 (theory).
P R O G R A M M A - AD - PROGRAMMING THE CONTROLLER LSI KR1818VG93 PART ONE, theoretically. The purpose of this paper is to give any novice programmer skills to use TR-DOS for its own purposes and at what level you want. This part will be pure foundation in theory on the subject, and those who think that does not need it can safely skip this section and go directly to the practical part. WARNING! All addresses in the Shadow ROM are for TR-DOS 5.03/04t. Just want to warn you that thought it was not me. I just brought in theory the data from different sources into the system and added something of themselves in order to facilitate understanding. In practice, the of all written personally by me and tested on their own experience. So, let's begin. IC KR1818VG93 - this single-chip programmable device designed to control the input / output information from computer on diskovert and back. BIS provides to program numbers of the tracks, sectors and stakeholders disc, long sectors, modes of search paths and installation of a magnetic head (hereinafter - MG) to its original position, the reading mode or recording of information, speed of movement MG. The controller enables automatic control read and write information on the control code (CC) recorded at the end of the index or information arrays. Index array includes an address tag, sector number, route number and the number of the disc. Data set contains a label and the data itself. In the recording mode melkoshema ensure that a write precompensation signals depending on the codes that represent information. Output information from the RAM runs at the signal REQUEST DATA shaped by melkoshemoy and read is determined by the ready signal and Momentum Index, issued by the instrumental diskoverta logic. Technical data and features KR1818VG93: High level input voltage, V, at least ...... 2.6 Input Low Voltage, V, no more ....... 0.8 High level output voltage, V, no less ..... 2.8 Low level output voltage, V, no more ...... 0.45 Output current high level, mA ...........- 0.15 Output current low level, mA, not more ............ 1.9 loading capacity of the exits, pF, no more ............ 100 maximum power consumption, mW, no more .... 500 Exchange of information with a computer is on an 8-bit bidirectional data bus. Record information to disk is carried out with single (frequency modulation - FM) or twice (modified frequency modulation - MSK) density. Melkoshema designed to work with a disk size of 5.25''and 8''(I have seen such, ROBOTRON'ovskie - awfully big mugs). The maximum programmable number of tracks on the disc - 256. The maximum speed of information exchange at World Cup - 250 kbit / s, MSK - 500 Kbps. External clock frequency generator - 1 MHz for the five inch disk and 2 MHz for up to eight inches. Chip is made in 40-pin package type 2 123.40-2. Pin assignment BIS KR1818VG93: The conclusion indicated. Operation is performed 1 BS podklyuchaetsya.Sdelan conclusion is not to control levels AE bias substrate melkoshemy 2 _ Recording resolution information from the data bus in W selected case 3 CS chip select allows the connection of computers with a micro scheme 4 _ Read permission allows the output data R from the selected register on the data bus DB0 ... DB7 5,6 A0, A1 address bus. The code for this bus defines you Bor appropriate register for the reception / transfer chi information from / to the data bus: A1 A0 Reading Record 0 0 RgSost RgKom 0 1 RgDor RgDor 1 0 RgSekt RgSekt January 1 RgDan RgDan 7 .. 14 DB0 .. DB7 Data Bus 15 STEP output pulse to move one step at MG 1916 DIRC signal indicating the direction of movement of MG: High - to the center of the disc, low - from the center 17 SL output signal indicating that the momentum is given GOVERNMENTAL WD should be shifted to the left 18 SR output signal, indicating that the momentum is given GOVERNMENTAL WD should be shifted to the right 19 ___ RESET will install chips in use CLR initial state and write the code 00000011 in RgKom At the exit 39 (INTRQ) is set low voltage level. At the end of the signal la CLR command is executed independently RECOVERY independently of the willingness diskoverta. Recorded a in RgSekt 20 Case GND 21 Ucc1 Supply voltage 5 V 22 ____ When applied to this input signal high level TEST AEs chip generates control pulses displacement MG (STEP) with increased frequency HRDY 23 MG in the operating position. Input, ordinances showing that GM is ready to work 24 CLC signal clock 25 RSTB GATE READING acknowledges receipt of data from discrete covert. At the output voltage is set High-level after taking 2 bytes of zeros at FM, and after taking 4 bytes of zeros or ones in MSK 26 HLT synchronizing clock signal 27 ____ Pulse input RAWR 28 HLD Output 1929 TR43 Output 30 WSTB GATE RECORDS has a high level at the time of pisi on disk 31 WD signals to write data to disk 32 CPRDY Input 33 WF / DE bidirectional bus is used to denote radiation error recording, or placing the choice of data GOVERNMENTAL, coming from a computer. WSTB = 1-concluded WF / DE works as WF-entry. If signal WF = 0 record of any team will be discontinued. WSTB = 0 output 33 operates as a DE-output. At the output de DE in the reading process after loading the MG and conditions SETTING high-level signal HRDY will UNE mummers low 34 ____ input signal indicating a chip that MG TR00 is set to the starting position (TRACK = 0) 35 __ The input signal from diskoverta. Mean arrival JP index pulse (hole in the floppy disks). 36 ____ Input prohibit writing to disk. Bottom WRPT cue signal stops recording 37 ____ input signal indicating a chip, with ka DDEN high density should be performed surgery 38 DRQ output in read mode indicates that RgDan contains information for transmission. In regime IU record indicates willingness to receive information mation from the bus dannyh.Etot signal set into a low level if the data is read in a computer or recorded in a computer in RgDan 39 INTRQ READY chip. At this exit establishes logger with high voltage, if the following varies any team, and low voltage level, if the chip is a command or read RgSost 40 Ucc2 Power supply 12 Exits 33, 38, 39 chips - conclusions, open source, requiring connection to power supply through resistors Ucc nominal value of 10 ohms + - 10%.
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