Z380 [8]

ZXNet echo conference «zx.spectrum»

From Walerij Kozhevnikov (500:95/462. To All 6 April 1998

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(Continued. Starts in numbers 7,6).

Bits, bytes, words and long words.

It is not difficult to see that these concepts are so simple and natural that there is no need for anything explain:

┌──┬──┬──┬──┬──┬──┬──┬──┐
│ 7│ 6│ 5│ 4│ 3│ 2│ 1│ 0│ - bits in a byte
└──┴──┴──┴──┴──┴──┴──┴──┘

Double-byte 16-bit word:

┌───────────────────────┐
│ high byte │ - address N+1
├───────────────────────┤
│ low byte │ - address N <--- address
└───────────────────────┘

Four-byte 32-bit long word:

┌───────────────────────┐
│ d31...24 │ - address N+3
├───────────────────────┤
│ d23...16 │ - address N+2
├───────────────────────┤
│ d15...8 │ - address N+1
├───────────────────────┤
│ d7...0 │ - address N <--- address
└───────────────────────┘

Memory space.

The only thing that perhaps requires at least mention
is the nature of memory access when accessing 16- or 32-bit data. Despite the fact that the data bus16-bit, there is a difference in accessing this, the address of the starting byte
which is even (A0=0) or odd (A0=1). It was difficult to understand
(once again...), but the following seems to be happening: if more than a 1-byte operand “falls” at an even address, then everything is in order - the low byte comes first, then the high byte; otherwise, the bytes are swapped so that the low byte always goes to the even address, and the high byte to the odd one; with an “incorrect” arrangement of bytes, accessing memory takes 2 machine cycles instead of one.

Two I/O device spaces - external and internal.

External I/O device space is represented by a subset of Z80 ports and an I/O address space extended to 32 bits. I/O commands from the Z80 subset remain the same both in mnemonics and in essence (the 16 most significant bits of the address bus are reset to 0). Some additional commands:

Group
of instructions A31...A24 A23...A16 A15...A8 A7...A0

IN dst,(C) BC31-BC24 BC23-BC16 BC15-BC8 BC7-BC0
IN0 dst,(n) 00000000 00000000 00000000 n
INA(W) dst,(mn)00000000 00000000 m n

DDIR IB INA(W) dst,(lmn)
00000000 l m n

DDIR IWINA(W) dst,(klmn)
k l m n

(output operations are similar).

The prefixes “DDIR IB”, “DDIR IW” mean receiving additional byte or dictionary data.

You can notice the appearance of direct addressing of ports up to 32 address bits and the same indirect addressing over the extended BC pair.
External device space I/O also provides
true 8-bit direct addressing of ports with commands of the form
OUT0 (n),r , where n is the 8-bit port address; r - register; The 24 most significant bits of the address are reset to 0.

Register flags... │ x │ H │ x │P/V│ N │ C S - sign sign;
Z - zero sign;
H - half-carry flag;
P/V - parity/overflow flag;
N - addition/subtraction sign (1 - subtraction, 0 - addition);
C - carry flag.

The N flag is used by the DAA command to determine the type of the previous
operation (addition or subtraction).
Everything is like in our good old friend Z80.

(To be continued).

Jason.

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