Z380 [7_2]

ZXNet echo conference «zx.spectrum»

From Walerij Kozhevnikov (500:95/462. To All 6 April 1998

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As you can see, the set of general purpose registers (POH) looks quite familiar. The difference with the Z80 is that in each of the two sets - the main and alternative - there is a quadruple set of POHs similar in purpose, and the registers are expanded to 32 bits. The POHs are used for storing and processing data and for addressing memory, and the 380 has significantly fewer restrictions on addressing methods. Accesses to POH are specified in instruction codes, plus the active register slot is specified by bits in the control register SR. Please note: the halves of the index registers now have official mnemonics - IXU, IYU for the older half and IXL, IYL for the younger half. (Suggestion in the order of nonsense: maybe the emerging standard should be taken into account in new assemblers for the Z80 that support mnemonics like "LD LX,E"?). It is not difficult to guess that the suffix "z" means combining the register line into a 32-bit register, but only in descriptions, not in operation mnemonics.

Control register SR.

<------------ YSR ------------> │ <------------ XSR --------->

0 0 0 0 0 │IY bank│IYP│ 0 0 0 0 0 │IX bank│IXP
└───┴───┴───┴───┴───┴───┴───
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

<---------DSR --------------> │
Main IEF
0 0 0 0 0 │ Bank │Alt│ XM│ LW│ 1 │ IM │ 0 │LCK│AFP│
───┴───┴───┴───┴───┴───┴───
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IYBANK - 2-bit IY-register bank selection field. Contains the number (0...3) of bank IY or IY'. After RESET, it is reset to 0.

IYP - bit for selecting the main or alternative register block
IY. 0 - main set, 1 - alternative set.

IXBANK, IXP - the same for IX.

MAINBANK - 2-bit field for selecting a block of registers AF,HL,DE,BC and
A',F',HL',DE',BC'. Contains the register bank number.

ALT - bit for selecting the main or alternative set HL,DE,BC.
0 - main, 1 - alternative.

XM (Extended Mode) - bit for setting the processor operating mode.
1 - extended mode, 0 - Z80 mode. There is no reverse switching to 0 (only RESET; even POP does not help).

LW (Long Word mode) - control bit for the “word”/“long word” mode. 1 is a long word, 0 is a regular (16-bit) word. (For
single instructions, you can set an individual word length mode, valid only within one instruction, using
special commands). RESET resets to 0.

IEF1 - maskable interrupt enable flag. 1 - interrupts
enabled, 0 -interrupts are prohibited. RESET resets to 0.

IM - 2-bit field for selecting interrupt mode 0,1,2 or 3.

LCK (Lock) - blocking bit for servicing requests to access the
system bus from other devices. 1 - external requests
are ignored, 0 - external requests are serviced. RESET resets to 0.

AFP - bit for selecting the main or alternative register block
AF (AF or AF'). 0 is primary, 1 is alternate.

The SR register is programmatically accessible as a 32-bit SR, as are the 3 8-bit registers YSR, XSR and DSR, and can also be saved
via PUSH and loaded via POP.

(To be continued).

Jason.

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