Z380 [6]
ZXNet echo conference «zx.spectrum»
From Walerij Kozhevnikov (500:95/462. → To All 6 April 1998
Hello Ivan!
Here I am throwing it. The number in brackets means the number of Nikron in which
was text.
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║▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒░ MPU Z380 ░▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒ ▒║
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[Here there should be a beautiful pseudo-graphic "cap": MPU Z380 ]
(C) WLODEK BLACK
Hello, friends!
Well, let's get started - the dish is served! (..."bite is served"...).
Today and for a long time to come we have for dessert - the Z380 microprocessor.
Here in front of me is a treasured book:
"Z380 Microprocessor. Product Specification".
On the inside page of the cover there is a stamp: "JSC Gamma. Distributor of components. Vyborg: Nekrasova str., 19. Tel. (81278) -
3-15-09, 2-56-71. St. Petersburg: metro station "Ploshchad Muzhestva", Politekhnicheskaya St., 22. Tel. (812) - 552-62-75, 247-54-73."
In Moscow, alas, There is no representative office of the Zilog corporation. There is
also in Voronezh - "Thesys/Intechna", tel. 0732553697 (that’s how it’s printed; where is the city code, and where is the phone number?). But St. Petersburg is relatively close; many have friends or relatives there; It is possible that the book can be ordered by mail. So if anyone is seriously interested, here is the address where you can get the firstthe processor itself and its description are known.
And now - to the point. Painfully crawling through the text without a dictionary,
I will retell the contents of the book in Russian in my own words,
since literal translation is prohibited (there is an inscription about this in the preface).
General characteristics of the Z380 microprocessor.
The presentation of the new processor took place in February 1995.
As an electronic component, the Z380 is a static type chip,
in technology CMOS, with low power consumption at rest.
Supply voltage + 3.3 ... 5 volts. Clock frequency up to 18 MHz
at 5 volts and up to 10 MHz at 3.3 V. Case - 100-pin QFP.
As a logic device, the Z380 is a 32-bit processor with 16-bit external and 32-bit internal data bus. The address bus is 32-bit. The address and data buses are not multiplexed -
each has its own lines: 32 - addresses and 16 - data.
Memory address space and equal device space
input-output - 4 gigabytes. The address space is linear and continuous; no “segments” or similar Intel nonsense.
The chip has a built-in RAM controller, allowing
to build a storage device from several physical modules of the required total capacity.
The command system implements a full set of methods for addressing data, transitions andsubroutines at relative addresses with 1-, 2-, and 3-byte offsets, which allows you to write freely relocatable programs in any conceivable address range. Even system
drivers will be able to work without any adjustment to the load address. Short instructions like "register-register" are executed in 2 cycles, which actually gives another 2-fold advantage compared to the Z80, that is, 18 MHz = 36 MHz. Introduced 3rd interrupt mode with
16-bit vector and 16-bit offset. Arithmetic
and logical operations are performed on 16-bit data. Multiplication and division are introduced. The processor can operate in Z80
mode and advanced mode. In Z80 mode, the address counter and
stack pointer work only with the lower 64K of memory; the remaining bits of the address are reset to 0. This mode is fully compatible with the prototype.
But even in it, the rest of the memory is available to accommodate data; access to it is possible by direct, indirect and index addressing. It was difficult to understand, but it seems that the stack pointer can also be loaded with a 32-bit value. But executable codes and
entry points into interrupt handling routines are located only in
64K. From Z80 mode, the processor switches to advanced mode
with one command, but there is no reverse switching (only RESET). In
Z80 mode you can execute all commands (not only fromsubsets Z80); The difference between the two modes is only in the distribution
of the range of addresses for executable codes. The data format can
be byte, word (WORD; W) and long word (LONG WORD; LW).
After reset, the format is set to word. Commands are available to
change the default data format. Arithmetic, logical
and shift operations do not work on "long" words and do not
keep track of the specified data format (always word format
or regular byte format for Z80 subset instructions). I/O operations also have a maximum 16-bit data format. The Z80 command system is included entirely as a subset of the Z380 command system; coincidence - right down to the operation codes. But the layout of commands for clock cycles and signals on the control bus is different.
Composition of processor registers: quadruple sets B, C, D, E, H, L
and their “dashed” counterparts, expanded to 32 bits; 4 sets of "battery-
accumulator + flags" (plus "primes"), remaining 8-bit; index registers IX and IY, extended to 32 bits (also 4 sets + ');
32-bit PC and SP; 16-bit I; 8-bit R; 32-bit control register ("selection register" - Select Register; SR).
Next time I'll try to draw with symbolspseudographics map of registers of the Z380 processor; I'll figure it out properly and tell anyone the purpose of the SR register bits. Then we'll figure out the structure of the address space, the data formats and,
finally, we'll get to the command system (!).
People! Who is interested (“this is cool!”) - write, call!!! Don't be shy! Your comments, wishes -> improving the results
of my work!
To be continued!
Jason.
Powered by ScorpionZS256turbo+/SMUC/HDD'IDE130Mb/FDD'800/
/CMOS/Covox/ATkbd/Mouse/CDOS...
From Andy Harchenko → To All 7 April 1998
Having sat down at the keyboard, I decided to draw a letter for you Walerij.
Once I was in a museum and there, on an old, old stone, an ancient man carved that
Monday April 06, 1998 right at 20:41, Walerij Kozhevnikov (500:95/462.18)
written by Ivan Mak:
WK> People! Who is interested (“this is cool!”) - write, call!!! Don't be shy! Your comments, wishes -> improving the results
WK> of my work!
WK> To be continued!
Cool, the main thing is more information.
P.S.: Why not make Sprinter 2 on the Z380???
WK> Jason.
Wiz zE BeSt WisHeZ 2 U!
-=JoCkeR/OmEga HaCkErS Grp/1998year=-
From Alexey Ivanov → To All 8 April 1998
Hi Andy!
Tue 07 Apr 1998 23:02, Andy Harchenko wrote to Walerij Kozhevnikov
(500:95/462.18):
WK>> call!!! Don't be shy! Your comments, wishes ->
WK>> improving the results of my work! To be continued!
AH> Cool, the main thing is more information.
Everything that was in Nikron about the z380 should go into the FAQ - in two zip archives.
Sincerely, Alexey Ivanov